The present invention relates generally to data communications networks and more particularly relates to a method of releasing stuck virtual circuits in an asynchronous transfer mode network.
Currently, there is a growing trend to make Asynchronous Transfer Mode (ATM) networking technology the base of future global communications. ATM has already been adopted as a standard for broadband communications by the International Telecommunications Union (ITU) and by the ATM Forum, a networking industry consortium.
ATM originated as a telecommunication concept defined by the Comite Consulatif International Telegraphique et Telephonique (CCITT), now known as the ITU, and the American National Standards Institute (ANSI) for carrying user traffic on any User to Network Interface (UNI) and to facilitate multimedia networking between high speed devices at multi-megabit data rates. ATM is a method for transferring network traffic, including voice, video and data, at high speed. Using this connection oriented switched networking technology centered around a switch, a great number of virtual connections can be supported by multiple applications through the same physical connection. The switching technology enables bandwidth to be dedicated for each application, overcoming the problems that exist in a shared media networking technology, like Ethernet, Token Ring and Fiber Distributed Data Interface (FDDI). ATM allows different types of physical layer technology to share the same higher layerxe2x80x94the ATM layer.
ATM is a connection oriented transport service. To access the ATM network, a station requests a virtual circuit between itself and other end stations, using the signaling protocol to the ATM switch. ATM provides the User Network Interface (UNI) that is typically used to interconnect an ATM user with an ATM switch that is managed as part of the same network.
The current standard solution for routing in a private ATM network is described in Private Network Node Interface (PNNI) Phase 0 and Phase 1 specifications published by the ATM Forum. The previous Phase 0 draft specification is referred to as Interim Inter-Switch Signaling Protocol (IISP). The goal of the PNNI specifications is to provide customers of ATM network equipment some level of multi-vendor interoperability.
ATM uses very short, fixed length packets called cells. The first five bytes, called the header, of each cell contain the information necessary to deliver the cell to its destination. The cell header also provides the network with the ability to implement congestion control and traffic management mechanisms. The fixed length cells offer smaller and more predictable switching delays as cell switching is less complex than variable length packet switching and can be accomplished in hardware for many cells in parallel. The cell format also allows for multi-protocol transmissions. Since ATM is protocol transparent, the various protocols can be transported at the same time. With ATM, phone, fax, video, data and other information can be transported simultaneously.
A diagram illustrating the format of an ATM cell including the cell header format across the UNI is shown in FIG. 1. The header comprises an 8-bit Virtual Path Indicator (VPI) and a 16-bit Virtual Circuit Indicator (VCI). A four-bit Generic Flow Control (GFC) field supports multiplexing functions. The GFC mechanism is intended to support simple flow control in ATM connections. The Cell Loss Priority (CLP) one-bit field corresponds to the loss priority of a cell. In operation, lower priority cells (i.e. CLP=1) can be discarded under congestion situations. The Header Error Check (HEC) is an 8-bit field that is used for header error detection and correction. The importance of the information in the header requires use of the HEC. The payload follows the HEC field in the ATM cell header and comprises 48 bytes.
The Payload Identifier Type (PTI) is a 3-bit cell header field for encoding information regarding ATM Adaptation Layer (AAL) and Explicit Forward Congestion Indication (EFCI). The AAL is a collection of standardized protocols that adapts user traffic to a cell format. AAL5 is the protocol standard used to support the transport of Variable Bit Rate (VBR) traffic and signaling messages. EFCI is a one-bit field containing information whether congestion at an intermediate node has been experienced. The EFCI bit is set when a threshold has been exceeded.
In the AAL5 protocol, every AAL frame to be transmitted over the ATM network is segmented into cells. The last cell of the frame is indicated in the ATM cell header in the PTI field of the cell header. In particular, the last cell is indicated by the third bit in the PTI field being cleared, the second bit a don""t care and the first bit being set, i.e. PTI=1 or 3. An ATM network device that receives AAL5 frames must reassemble all the cells received over each Virtual Circuit (VC), i.e. VPI/VCI pair, until the last cell of the frame is received. After the last cell of the cell is received, the entire frame is available and can be sent to its corresponding destination port, i.e. Ethernet port, host, etc.
A problem occurs, however, in the event the last cell of the frame on a specific VC gets lost and no subsequent xe2x80x98last cellxe2x80x99 is received (even from the next frame) on the VC. In the event the last cell is not received, the previously received cells of the frame remain stored in the network device and consume memory resources that are never released since a last cell indication will never be received on the specific VC. The problem is compounded in an ATM network device that establishes a large number of VCs (i.e. several thousand) wherein the last cell is lost for a large percentage of the VCs. In this case, a majority of the memory resources may be consumed and not available for other VCs.
For example, a network device such as an ATM switch or edge device that is connected to the ATM network may be accidentally disconnected. All virtual circuit connections that were already established and that were in the midst of receiving frames, will never be completed and closed. The frames waiting to complete consume memory resources and depending on the number of incomplete frames, the amount of memory may be large.
Consider an ATM edge device adapted to transport 10 Mbps Ethernet over the ATM network. Assume each Ethernet frame comprises 1518 bytes, thus occupying 32 ATM cells to send the corresponding AAL5 frame. Assuming one thousand open connections at the time the device is disconnected from the network, this translates to approximately 1.5 Mbytes of memory. Depending on the size of the memory in the device, this may amount to a sizeable portion of the memory. Note that even a relatively small portion of memory, e.g., 5 or 10%, creates a problem since the memory consumption is cumulative if it is not released.
In some cases, the hardware in the device will timeout and cause the software to clear the call, but the memory consumed by the incomplete frame remains. In other cases, both the virtual circuit connection remains and the memory is not cleared.
It is therefore desirable to have a mechanism adapted to locate virtual circuits that are stuck due to lost xe2x80x98last cellsxe2x80x99 and to release these xe2x80x98stuckxe2x80x99 virtual circuits thus freeing up memory resources that could be used for new virtual circuits.
The present invention solves the problems associated with the prior art by providing an apparatus for and a method of locating and releasing stuck virtual circuits in an ATM network device. The invention functions to free memory resources that would otherwise be lost due to the last cell of a frame not being received on a particular virtual circuit. The memory savings made possible by the present invention increase as the number of virtual circuits increase wherein the last cell of the frame was not received.
Throughout this document the term stuck virtual circuit is meant to denote a virtual circuit wherein the last cell of a frame being transmitted over that virtual circuit is never received. This may be caused for any reason such as an ATM network device losing its ATM connection due to a disconnection, loss of power, mechanical fault, etc.
The invention utilizes two flags: a first_cell flag and a last_cell flag, to track the status of the receipt of a frame over a virtual circuit. The hardware sets the last_cell bit to xe2x80x981xe2x80x99 for a specific virtual circuit when a cell with an end of frame indication is received on that virtual circuit. The hardware clears the last_cell bit to xe2x80x980xe2x80x99 for a specific virtual circuit when a cell is received without an end of frame indication on that virtual circuit. The hardware sets the first_cell bit to xe2x80x981xe2x80x99 for a specific virtual circuit when the first cell of a frame is received on that virtual circuit. Otherwise the hardware does not modify the first cell_bit. The first_cell bit operates as a xe2x80x98stickyxe2x80x99 bit as the hardware can only set the bit and cannot clear it. The bit can only be cleared by software.
The software periodically examines the two flags and if both the first_cell flag and last_cell flags are found cleared then a xe2x80x98stuckxe2x80x99 virtual circuit is identified. This means that the hardware did not detect a first cell of a frame on this particular virtual circuit since the last time the software cleared this bit to xe2x80x980xe2x80x99.
Once a stuck virtual circuit is detected, the software generates a single cell adapted to have an end of frame indication. The cell is processed as if it was received over the ATM network on the problematic virtual circuit and will cause the frame to be closed on this particular virtual circuit, thus releasing the memory resources.
Alternatively, the software writes the VPI and VCI to a hardware register and in response, the hardware restores the state of the virtual circuit back to normal operating state. The hardware comprises the appropriate circuitry and logic to emulate the events that would occur if it had received a cell in error having an end of frame indication.
Preferably, the software scans the first_cell and last_cell bits on a periodic basis. Alternatively, the software may scan on an irregular basis such when the software performs regular housekeeping tasks.
There is thus provided in accordance with the present invention a method of releasing a stuck virtual circuit, wherein the last cell of a frame transmitted on the virtual circuit is not received, the method comprising the steps of setting a first_cell flag upon reception of the first cell of a frame on the virtual circuit, setting a last_cell flag upon reception of a cell on the virtual circuit having an end of frame indication, clearing the last_cell flag upon reception of a cell on the virtual circuit not having an end of frame indication, examining the first_cell flag and the last_cell flag periodically; and if the first_cell flag is set, clearing the first_cell flag, and if, after a predetermined period of time, the first_cell flag is cleared and the last_cell flag is cleared then identifying the virtual circuit as a stuck virtual circuit and releasing memory resources currently consumed by the stuck virtual circuit.
There is also provided in accordance with the present invention a method of releasing a stuck virtual circuit, wherein the last cell of a frame transmitted on the virtual circuit is not received, the method comprising the steps of setting a first_cell bit upon reception of the first cell of a frame on the virtual circuit, setting a last_cell bit upon reception of a cell on the virtual circuit having an end of frame indication, clearing the last_cell bit upon reception of a cell on the virtual circuit not having an end of frame indication, examining on a periodic basis the first_cell bit and the last_cell bit, and if the first_cell bit is set, clearing the first_cell bit, identifying the virtual circuit as a stuck virtual circuit when a first cell has not been received since the first_cell bit was cleared and the last_cell bit is cleared and releasing memory resources currently consumed by the stuck virtual circuit.
There is further provided in accordance with the present invention an apparatus for releasing a stuck virtual circuit, wherein the last cell of a frame transmitted on the virtual circuit is not received comprising a control memory adapted to store, for each virtual circuit, a first_cell bit and a last_cell bit, a cell processor operative to set a first_cell bit upon reception of the first cell of a frame on the virtual circuit, set a last_cell bit upon reception of a cell on the virtual circuit having an end of frame indication, clear the last_cell bit upon reception of a cell on the virtual circuit not having an end of frame indication, software means operative on the cell processor to examining the first_cell bit and the last_cell bit periodically, and if the first_cell bit is set, clearing the first_cell bit; and if, after a predetermined period of time, the first_cell bit is cleared and the last_cell bit is cleared then identifying the virtual circuit as a stuck virtual circuit and means for releasing memory resources currently consumed by the stuck virtual circuit.